How can I run two makefile targets such that the second uses the first's variables?










0















I am writing a makefile that has multiple targets for architectures and build types. When I call make I would like to be able to pass it two targets such as:



make x86 debug


Where the architecture target sets variables to be used by the build target. An architecture target might look like this:



.PHONY: x86
x86: NAME_PREFIX = x86_64_Linux
x86: TARGET_TRIPLE = x86_64-pc-linux-elf
x86: CC = gcc
x86: CFLAGS += -fomit-frame-pointer


First issue: If I run the two targets, make skips the first target since it does nothing but set variables.



$ make x86 debug
make: Nothing to be done for `x86'.


Second issue: Even if it would run the first target, my understanding is that the values won't be retained when make starts running the second target anyway.



For now, I'm using targets that set variables and add the build type target as a prerequisite at the end of the target body, but I would end up needing a target for every combination of architecture and build type.



.PHONY: x86_debug
x86_debug: NAME_PREFIX = x86_64_Linux
x86_debug: TARGET_TRIPLE = x86_64-pc-linux-elf
x86_debug: CC = gcc
x86_debug: CFLAGS += -fomit-frame-pointer
x86_debug: debug









share|improve this question




























    0















    I am writing a makefile that has multiple targets for architectures and build types. When I call make I would like to be able to pass it two targets such as:



    make x86 debug


    Where the architecture target sets variables to be used by the build target. An architecture target might look like this:



    .PHONY: x86
    x86: NAME_PREFIX = x86_64_Linux
    x86: TARGET_TRIPLE = x86_64-pc-linux-elf
    x86: CC = gcc
    x86: CFLAGS += -fomit-frame-pointer


    First issue: If I run the two targets, make skips the first target since it does nothing but set variables.



    $ make x86 debug
    make: Nothing to be done for `x86'.


    Second issue: Even if it would run the first target, my understanding is that the values won't be retained when make starts running the second target anyway.



    For now, I'm using targets that set variables and add the build type target as a prerequisite at the end of the target body, but I would end up needing a target for every combination of architecture and build type.



    .PHONY: x86_debug
    x86_debug: NAME_PREFIX = x86_64_Linux
    x86_debug: TARGET_TRIPLE = x86_64-pc-linux-elf
    x86_debug: CC = gcc
    x86_debug: CFLAGS += -fomit-frame-pointer
    x86_debug: debug









    share|improve this question


























      0












      0








      0








      I am writing a makefile that has multiple targets for architectures and build types. When I call make I would like to be able to pass it two targets such as:



      make x86 debug


      Where the architecture target sets variables to be used by the build target. An architecture target might look like this:



      .PHONY: x86
      x86: NAME_PREFIX = x86_64_Linux
      x86: TARGET_TRIPLE = x86_64-pc-linux-elf
      x86: CC = gcc
      x86: CFLAGS += -fomit-frame-pointer


      First issue: If I run the two targets, make skips the first target since it does nothing but set variables.



      $ make x86 debug
      make: Nothing to be done for `x86'.


      Second issue: Even if it would run the first target, my understanding is that the values won't be retained when make starts running the second target anyway.



      For now, I'm using targets that set variables and add the build type target as a prerequisite at the end of the target body, but I would end up needing a target for every combination of architecture and build type.



      .PHONY: x86_debug
      x86_debug: NAME_PREFIX = x86_64_Linux
      x86_debug: TARGET_TRIPLE = x86_64-pc-linux-elf
      x86_debug: CC = gcc
      x86_debug: CFLAGS += -fomit-frame-pointer
      x86_debug: debug









      share|improve this question
















      I am writing a makefile that has multiple targets for architectures and build types. When I call make I would like to be able to pass it two targets such as:



      make x86 debug


      Where the architecture target sets variables to be used by the build target. An architecture target might look like this:



      .PHONY: x86
      x86: NAME_PREFIX = x86_64_Linux
      x86: TARGET_TRIPLE = x86_64-pc-linux-elf
      x86: CC = gcc
      x86: CFLAGS += -fomit-frame-pointer


      First issue: If I run the two targets, make skips the first target since it does nothing but set variables.



      $ make x86 debug
      make: Nothing to be done for `x86'.


      Second issue: Even if it would run the first target, my understanding is that the values won't be retained when make starts running the second target anyway.



      For now, I'm using targets that set variables and add the build type target as a prerequisite at the end of the target body, but I would end up needing a target for every combination of architecture and build type.



      .PHONY: x86_debug
      x86_debug: NAME_PREFIX = x86_64_Linux
      x86_debug: TARGET_TRIPLE = x86_64-pc-linux-elf
      x86_debug: CC = gcc
      x86_debug: CFLAGS += -fomit-frame-pointer
      x86_debug: debug






      makefile gnu-make






      share|improve this question















      share|improve this question













      share|improve this question




      share|improve this question








      edited Nov 15 '18 at 18:03







      superb owl

















      asked Nov 15 '18 at 17:24









      superb owlsuperb owl

      153




      153






















          1 Answer
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          0














          Your second approach is better. But you don't need a target for every combination, if you use a consistent naming scheme, and use wildcard targets:



          .PHONY: x86_% arm_% # etc
          .PHONY: %_debug %_optimised # etc

          x86_%: NAME_PREFIX = x86_64_Linux
          x86_%: TARGET_TRIPLE = x86_64-pc-linux-elf
          x86_%: CC = gcc
          x86_%: CFLAGS += -fomit-frame-pointer

          arm_%: NAME_PREFIX = ARM_LINUX
          arm_%: TARGET_TRIPLE = arm-linux-eabi
          arm_%: CC = arm-linux-gcc


          %_debug: CFLAGS += -g

          %_optimised: CFLAGS += -O3





          share|improve this answer























          • I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

            – superb owl
            Nov 15 '18 at 18:12











          • I'm sure I've done something like that before. You did include a target with rules, right?

            – Toby Speight
            Nov 15 '18 at 18:34











          • Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

            – superb owl
            Nov 15 '18 at 19:08






          • 1





            I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

            – superb owl
            Nov 15 '18 at 19:43












          • An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

            – MadScientist
            Nov 15 '18 at 22:42










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          1 Answer
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          1 Answer
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          active

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          0














          Your second approach is better. But you don't need a target for every combination, if you use a consistent naming scheme, and use wildcard targets:



          .PHONY: x86_% arm_% # etc
          .PHONY: %_debug %_optimised # etc

          x86_%: NAME_PREFIX = x86_64_Linux
          x86_%: TARGET_TRIPLE = x86_64-pc-linux-elf
          x86_%: CC = gcc
          x86_%: CFLAGS += -fomit-frame-pointer

          arm_%: NAME_PREFIX = ARM_LINUX
          arm_%: TARGET_TRIPLE = arm-linux-eabi
          arm_%: CC = arm-linux-gcc


          %_debug: CFLAGS += -g

          %_optimised: CFLAGS += -O3





          share|improve this answer























          • I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

            – superb owl
            Nov 15 '18 at 18:12











          • I'm sure I've done something like that before. You did include a target with rules, right?

            – Toby Speight
            Nov 15 '18 at 18:34











          • Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

            – superb owl
            Nov 15 '18 at 19:08






          • 1





            I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

            – superb owl
            Nov 15 '18 at 19:43












          • An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

            – MadScientist
            Nov 15 '18 at 22:42















          0














          Your second approach is better. But you don't need a target for every combination, if you use a consistent naming scheme, and use wildcard targets:



          .PHONY: x86_% arm_% # etc
          .PHONY: %_debug %_optimised # etc

          x86_%: NAME_PREFIX = x86_64_Linux
          x86_%: TARGET_TRIPLE = x86_64-pc-linux-elf
          x86_%: CC = gcc
          x86_%: CFLAGS += -fomit-frame-pointer

          arm_%: NAME_PREFIX = ARM_LINUX
          arm_%: TARGET_TRIPLE = arm-linux-eabi
          arm_%: CC = arm-linux-gcc


          %_debug: CFLAGS += -g

          %_optimised: CFLAGS += -O3





          share|improve this answer























          • I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

            – superb owl
            Nov 15 '18 at 18:12











          • I'm sure I've done something like that before. You did include a target with rules, right?

            – Toby Speight
            Nov 15 '18 at 18:34











          • Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

            – superb owl
            Nov 15 '18 at 19:08






          • 1





            I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

            – superb owl
            Nov 15 '18 at 19:43












          • An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

            – MadScientist
            Nov 15 '18 at 22:42













          0












          0








          0







          Your second approach is better. But you don't need a target for every combination, if you use a consistent naming scheme, and use wildcard targets:



          .PHONY: x86_% arm_% # etc
          .PHONY: %_debug %_optimised # etc

          x86_%: NAME_PREFIX = x86_64_Linux
          x86_%: TARGET_TRIPLE = x86_64-pc-linux-elf
          x86_%: CC = gcc
          x86_%: CFLAGS += -fomit-frame-pointer

          arm_%: NAME_PREFIX = ARM_LINUX
          arm_%: TARGET_TRIPLE = arm-linux-eabi
          arm_%: CC = arm-linux-gcc


          %_debug: CFLAGS += -g

          %_optimised: CFLAGS += -O3





          share|improve this answer













          Your second approach is better. But you don't need a target for every combination, if you use a consistent naming scheme, and use wildcard targets:



          .PHONY: x86_% arm_% # etc
          .PHONY: %_debug %_optimised # etc

          x86_%: NAME_PREFIX = x86_64_Linux
          x86_%: TARGET_TRIPLE = x86_64-pc-linux-elf
          x86_%: CC = gcc
          x86_%: CFLAGS += -fomit-frame-pointer

          arm_%: NAME_PREFIX = ARM_LINUX
          arm_%: TARGET_TRIPLE = arm-linux-eabi
          arm_%: CC = arm-linux-gcc


          %_debug: CFLAGS += -g

          %_optimised: CFLAGS += -O3






          share|improve this answer












          share|improve this answer



          share|improve this answer










          answered Nov 15 '18 at 17:28









          Toby SpeightToby Speight

          17.1k134367




          17.1k134367












          • I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

            – superb owl
            Nov 15 '18 at 18:12











          • I'm sure I've done something like that before. You did include a target with rules, right?

            – Toby Speight
            Nov 15 '18 at 18:34











          • Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

            – superb owl
            Nov 15 '18 at 19:08






          • 1





            I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

            – superb owl
            Nov 15 '18 at 19:43












          • An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

            – MadScientist
            Nov 15 '18 at 22:42

















          • I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

            – superb owl
            Nov 15 '18 at 18:12











          • I'm sure I've done something like that before. You did include a target with rules, right?

            – Toby Speight
            Nov 15 '18 at 18:34











          • Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

            – superb owl
            Nov 15 '18 at 19:08






          • 1





            I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

            – superb owl
            Nov 15 '18 at 19:43












          • An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

            – MadScientist
            Nov 15 '18 at 22:42
















          I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

          – superb owl
          Nov 15 '18 at 18:12





          I modified my makefile accordingly but make doesn't seem to recognize % as a wildcard character. I'm using GNU Make 3.82.

          – superb owl
          Nov 15 '18 at 18:12













          I'm sure I've done something like that before. You did include a target with rules, right?

          – Toby Speight
          Nov 15 '18 at 18:34





          I'm sure I've done something like that before. You did include a target with rules, right?

          – Toby Speight
          Nov 15 '18 at 18:34













          Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

          – superb owl
          Nov 15 '18 at 19:08





          Yes, the build targets have rules. I'm simply getting make: *** No rule to make target 'x86_debug'. Stop. despite having the target x86_% as in the example and a %_debug target that calls the compiler.

          – superb owl
          Nov 15 '18 at 19:08




          1




          1





          I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

          – superb owl
          Nov 15 '18 at 19:43






          I figured out the problem. I had an additional target clean which I changed to %_clean so I could use it in place of my build type target. My %_debug target runs clean before compiling, so I changed the prerequisite to _clean. The problem is that the stem can't be a zero-length string, so _clean doesn't match %_clean. I would have thought make would give me a more helpful error like "No rule to make target _clean required by %_debug" or something like that.

          – superb owl
          Nov 15 '18 at 19:43














          An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

          – MadScientist
          Nov 15 '18 at 22:42





          An error like that doesn't quite make sense. A pattern is a hint about one possible way to build a target. You can have lots of patterns that could be used to build the same target (consider %.o as a pattern target...!) so if a given pattern doesn't match, make can't say that it's an error. It goes to the next one. Only after no patterns match can make conclude that no rule exists to build a given target. It can't spit out errors for each prerequisite that couldn't be built for each pattern rule that matches a target.

          – MadScientist
          Nov 15 '18 at 22:42



















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