choosing between # of set associative cache










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Suppose you have several chips that implement the same x86-64 instruction set. The chip east chip uses a direct-mapped cache, the next-cheapest one uses a 2-way set-associative cache; the next-cheapest on a 4-way ... and so on for 8-way and 16-way. All the caches use a 64- byte cache line and they all contain 1 MiB of data. If you are interested in executing a function that multiply array of floats on many small arrays( with typical size 256 bytes), which of these chips will you be most interested in using, if you want to maximize the bang for you buck?










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    Suppose you have several chips that implement the same x86-64 instruction set. The chip east chip uses a direct-mapped cache, the next-cheapest one uses a 2-way set-associative cache; the next-cheapest on a 4-way ... and so on for 8-way and 16-way. All the caches use a 64- byte cache line and they all contain 1 MiB of data. If you are interested in executing a function that multiply array of floats on many small arrays( with typical size 256 bytes), which of these chips will you be most interested in using, if you want to maximize the bang for you buck?










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      Suppose you have several chips that implement the same x86-64 instruction set. The chip east chip uses a direct-mapped cache, the next-cheapest one uses a 2-way set-associative cache; the next-cheapest on a 4-way ... and so on for 8-way and 16-way. All the caches use a 64- byte cache line and they all contain 1 MiB of data. If you are interested in executing a function that multiply array of floats on many small arrays( with typical size 256 bytes), which of these chips will you be most interested in using, if you want to maximize the bang for you buck?










      share|improve this question














      Suppose you have several chips that implement the same x86-64 instruction set. The chip east chip uses a direct-mapped cache, the next-cheapest one uses a 2-way set-associative cache; the next-cheapest on a 4-way ... and so on for 8-way and 16-way. All the caches use a 64- byte cache line and they all contain 1 MiB of data. If you are interested in executing a function that multiply array of floats on many small arrays( with typical size 256 bytes), which of these chips will you be most interested in using, if you want to maximize the bang for you buck?







      caching






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      asked Nov 13 '18 at 4:42









      Dchen236Dchen236

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